Integral INSSD64GP18MXZ Datový list stáhnout pdf (Strana 6)

6

30

INTRQ(Interrupt)

O

When this device is selected, this signal is

the active high Interrupt Request to the

host

Pin No.

Signal

I/O

Description

34, 33

DA0~DA2(Device Address)

I

This is 3-bit binary coded Address Bus.

32

-PDIAG(Passed diagnostics)

I/O

This signal will be asserted by Device 1 to

indicate to Device 0 that Device 1 has

completed diagnostics,

-CBLID(Cable assembly

type identify)

35, 36

-CS0, -CS1(Chip select)

I

These signals are used to select the

Command Block and Control Block

registers. When –DMACK is asserted, -Cs0

and –Cs1 shall be negated and transfers

shall be 16-bit wide.

37

-DASP(Device active, Device

1 present)

I/O

During the reset protocol, -DASP shall be

asserted by Device 1 to indicate that the

device is present.

04, 21, 23, 26, 28

GND

--

Ground.

*Note:

“I” An input from the host system to the device.

“O” An output from the device to the host system.

“I/O” An input/output(bi-direction) common.

“P” Power supply.

1 2 3 4 5 6 7 8 9 10 11 ... 23 24

Komentáře k této Příručce

Žádné komentáře